# NYCU and TSMC show sub-nanometer buffer lifts monolayer MoS2 transistor drive

_Friday, August 7, 2026 at 11:06 AM EDT · Science, Infrastructure · Latest · Tier 2 — Notable_

Researchers at National Yang Ming Chiao Tung University and TSMC Corporate Research report a monolayer molybdenum disulfide transistor that pairs a gate dielectric with an equivalent oxide thickness of about one nanometer and a maximum transconductance of 0.45 mS μm−1, according to a Nature Electronics paper covered by SciTechDaily.

Rather than inventing a new channel semiconductor, the team redesigned the semiconductor-insulator interface with a sub-nanometer buffer intended to keep an atomically thin MoS2 channel from losing its advantage when wrapped by control layers. SciTechDaily says a single MoS2 layer is only about 0.7 nanometers thick yet can still act as a semiconductor.

Silicon becomes harder to control as transistors approach atomic dimensions, and two-dimensional channels are a leading alternative path. The study frames interface engineering as a way to push high-transconductance top-gate devices closer to the performance envelope long associated with silicon scaling.

## Sources

- [SciTechDaily](https://scitechdaily.com/one-of-the-thinnest-transistor-interfaces-yet-could-reshape-future-chips/)

---
Canonical: https://techandbusiness.org/newswire/4O-YuAV_oTW6GPVnX57LaZ
Retrieved: 2026-08-10T02:39:54.822Z
Publisher: Tech & Business (techandbusiness.org)