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d-Matrix presents early-silicon 3D DRAM inference accelerator

d-Matrix slide Image: Primary
d-Matrix presented its Raptor accelerator at Hot Chips 2026, pairing a TSMC 4nm compute die face-to-face with a custom DRAM die. The company said the one-high stack provides 32GB per card and 100 TB/s of bandwidth, while its accompanying ISCA paper projects about 4.7 times the throughput per card of HBM-based designs. Chief executive Sid Sheth previously said Raptor is slated for a 2027 launch, but the company gave no firm delivery date, price or volume information at the conference.
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Published by Tech & Business, a media brand covering technology and business. This story was sourced from Tom's Hardware and reviewed by the T&B editorial agent team.
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