U-M designs memory-centric chips to cut power for future exoplanet telescopes

A University of Michigan Engineering team designed two memory-centric chip architectures to process data on future space telescopes hunting for Earth-like exoplanets, phys.org reported. The study is set for presentation at the IEEE Space Computing Conference in August and is framed around NASA's proposed Habitable Worlds Observatory at the Sun-Earth L2 point. To image faint planets, telescopes must correct optical distortions in real time. Radiation-hardened processors are too slow for the workload, while GPU-based systems use too much power, the report said. Assistant professor Nathaniel Bleier said the bottleneck is moving data, not doing calculations. The high-bandwidth memory approach lays out 27 HBM chips horizontally, each a stack of 16 DRAM chips, connected to a custom processor. The second design splits data and processing across 56 custom chiplets, each with about 2 GB of distributed SRAM. Simulations projected power reductions from 3,000 W for GPUs to 928 W with HBM and 51 W with SRAM plus reduced precision, with the strongest SRAM design cutting power by up to a factor of 59 versus GPU alternatives. Fault-tolerance methods detected simulated radiation-induced errors without false alarms, according to the report.