Samsung reportedly plans TSMC process for Nvidia custom memory

Samsung Electronics plans to use TSMC's 3-nanometer manufacturing process for base dies in Nvidia's next-generation custom high-bandwidth memory chips, the Seoul Economic Daily reported on October 18. High-bandwidth memory stacks memory chips vertically to give AI processors rapid access to large amounts of data. The manufacturing plan comes as memory producers allocate more capacity to these chips. Samsung Executive Vice President Kim Taewoo said on September 29 that HBM was expected to consume nearly 30% of DRAM producers' wafer capacity in 2027, compared with about 20% currently. He said expanding HBM production could constrain conventional DRAM supply because both compete for the same wafer capacity.