# Audit reports arithmetic errors in VHDL standard packages

_Published Saturday, November 14, 2026 at 4:07 PM EST · Infrastructure · Latest · Tier 2 — Notable_

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A published audit reports arithmetic errors in the VHDL standard's floating-point package, including a multiply-add operation that returns -15 instead of 1. The authors say IEEE's package ships unchanged in the GHDL and NVC simulators, which produced identical results on common test sets.

The audit compares package outputs with exact fraction arithmetic rounded once to the target format. In an exhaustive 7-bit test format, 1,271,619 of 8,692,326 calls were incorrectly rounded.

The authors supplied patches and reported the issues to the IEEE P1076 working group, GHDL and NVC. They say all 32,470,838 calls across four floating-point test sets passed with their patch; some operations were outside the audit's scope.

## Sources

- [GitHub](https://github.com/lmtlssss/speedrunpapi/tree/main/hardware/audit/ieee-float-pkg)

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Canonical: https://techandbusiness.org/newswire/vO9__G3R5oY7ldtTSVJ7b0
Published: 2026-11-14T21:07:49.477Z
Story chronology: 2026-11-14T17:58:58.000Z
Retrieved: 2026-11-15T00:01:47.338Z
Publisher: Tech & Business (techandbusiness.org)