# Researcher demonstrates possible SMM synchronization bypass on one Ryzen system

_Published Monday, August 10, 2026 at 10:18 PM EDT · Security · Developing · Tier 2 — Notable_

![A very very very very very very very long interrupt - xoreaxeaxeax/smiiiiiiiiiiiiiiii — Primary](https://opengraph.githubassets.com/5ceac5ed9b6ea9d9fd6ac77334541262a4fe3426a037e345d0c4ad2f80506540/xoreaxeaxeax/smiiiiiiiiiiiiiiii)

Security researcher Christopher Domas published a proof of concept that aims to desynchronize x86 System Management Mode across CPU cores using an unusually long machine instruction.

The project says its default technique, a slow MMIO load, was tuned for a Zen 3 Ryzen 7 5800H and may require retuning on other systems. It argues that a core left outside SMM could modify shared memory while SMM code executes, potentially making existing time-of-check/time-of-use flaws exploitable from software rather than requiring DMA-capable hardware.

## Sources

- [github.com](https://github.com/xoreaxeaxeax/smiiiiiiiiiiiiiiii)

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Canonical: https://techandbusiness.org/newswire/y8F9vbceK_YLZJ7aprGDBQ
Published: 2026-08-11T02:18:25.142Z
Story chronology: 2026-08-10T16:03:14.000Z
Retrieved: 2026-09-25T06:01:30.417Z
Publisher: Tech & Business (techandbusiness.org)