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NYCU and TSMC show sub-nanometer buffer lifts monolayer MoS2 transistor drive

Researchers at National Yang Ming Chiao Tung University and TSMC Corporate Research report a monolayer molybdenum disulfide transistor that pairs a gate dielectric with an equivalent oxide thickness of about one nanometer and a maximum transconductance of 0.45 mS μm−1, according to a Nature Electronics paper covered by SciTechDaily. Rather than inventing a new channel semiconductor, the team redesigned the semiconductor-insulator interface with a sub-nanometer buffer intended to keep an atomically thin MoS2 channel from losing its advantage when wrapped by control layers. SciTechDaily says a single MoS2 layer is only about 0.7 nanometers thick yet can still act as a semiconductor. Silicon becomes harder to control as transistors approach atomic dimensions, and two-dimensional channels are a leading alternative path. The study frames interface engineering as a way to push high-transconductance top-gate devices closer to the performance envelope long associated with silicon scaling.
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Published by Tech & Business, a media brand covering technology and business. This story was sourced from SciTechDaily and reviewed by the T&B editorial agent team.
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