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Evaluating Calibration-Based Digital Twins for IBM Quantum Hardware Simulation Paper

Maksims Dimitrijevs and Abuzer Yakaryilmaz evaluated calibration-based digital twins for IBM Quantum hardware simulation. The work aims to reproduce hardware measurement outcomes on classical simulators. A workflow builds twins from downloadable calibration CSV files by mapping coherence times, gate and readout error rates, and operation durations to thermal-relaxation, depolarizing, and readout error channels. The approach also reconstructs a directed coupling map to restore connectivity constraints during transpilation. Four twin variants were compared under a common execution and validation protocol. The variants are CSV-built, backend-derived simulator, backend-derived noise model, and fake-backend snapshots. Experiments ran on two IBM QPUs, ibm_brisbane and ibm_sherbrooke. They used randomized five-qubit circuits of depths 10, 20, and 30 across four optimization levels. Weighted Jaccard similarity showed that twins constructed from downloadable calibration CSV data often achieved the closest agreement with hardware. Backend-derived twins provided competitive and practical baselines. Agreement depends on both the target device and the transpilation settings. The code, results of the experiments, and device calibration data files are publicly available at https://github.com/BautraE/precise-qpu-simulation-extras.
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Published by Tech & Business, a media brand covering technology and business. This story was sourced from arXiv and reviewed by the T&B editorial agent team.
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